No leads-packages used for semiconductor devices are for example quad-flat no-leads (QFN) or dual-flat no-leads (DFN) packages. Such devices comprise a semiconductor die within a molded housing that comprises no leads. The housing comprises contact pads that do not extend from the housing. In the manufacturing process, a plurality of these devices are placed on a respective QFN/DFN metal “lead frame” and molded together to form a strip including a matrix of a plurality of devices as shown in FIG. 1.
During the conventional QFN/DFN assembly process, the semiconductor devices in the molded strip are shorted together and thus do not allow for testing. Thus, to process this strip as shown in FIG. 1 to a so-called strip test form, the semiconductor devices need to be at least partially isolated prior to testing. This is usually accomplished by a saw blade, laser or water jet. FIG. 2 shows a close-up of several semiconductor devices arranged in a strip after partial isolation. As shown, the devices are cut at a location that separates the contact pads of adjacent semiconductor devices. Some strip warping is often found after such a partial isolation process. However, the strip can still be used for testing in respective machines for ambient or high temperature strip testing.
Certain semiconductor devices, for example devices for the automotive industry, require testing at low temperatures. However, the isolation (partial cut) strip may experience significant warping when exposed to low temperatures, for example at temperatures below −20° C. in an environment chamber due to the property of the metal lead frame (strip). Due to the warping caused by such low temperatures, testing cannot be properly performed, for example, because the warping will cause a vacuum mechanism in a conventional strip test handler to fail. FIGS. 3A and 3B show an example of a warped strip after exposure to low temperatures. For this reason, many semiconductor manufacturers limit the testing of isolation strips to ambient testing and do not perform testing at lower temperatures.
Another attempted solution for strip testing at low temperatures is to leave the semiconductor devices on a film frame after full separation (singulation) of the devices, and perform low temperature testing on the singulated devices. However, tape distortion during the singulation process affects the alignment and/or spacing between devices, leading to problems during subsequent picking of the devices from the frame, and limiting the number of parallelism testing.
Thus, there is a need for an improved manufacturing and/or assembly procedure to allow low temperature testing of semiconductor devices in no-lead packages, e.g., semiconductor devices arranged in an isolation (partially cut) strip.